Huawei Unveils 'Tao Law'—Semiconductor Stocks Surge as Cambricon's Market Cap Tops $125B

“Tao’s Law” Emerges: China’s Semiconductor Industry Enters a New Era of “Logical Folding”

On the morning of May 25, the A-share market displayed pronounced structural strength: the STAR 50 Index surged 3.56%—its largest single-day gain in over one and a half years; the semiconductor sector ignited across the board, with more than ten stocks—including Dongxi Semiconductor, ChipMOS, and New Jet—hitting the daily trading limit; heavyweight constituents such as SMIC, Cambricon, and Longsys rose broadly by over 10%; the Shanghai Composite, Shenzhen Component, and ChiNext Indices all closed higher, with the ChiNext Index leading major broad-market indices at +1.14%. Most strikingly, AI chip leader Cambricon soared over 11% in a single day, setting a new all-time high for its share price and pushing its total market capitalization above RMB 900 billion. This rally is no isolated event—it is a systemic revaluation triggered by Huawei’s formal unveiling of “Tao’s Law” and the imminent mass production of its Kirin 2026 chip, further amplified by accelerating commercial validation of domestically developed AI chips. It signals a profound paradigm shift within China’s semiconductor industry: a decisive move away from long-standing reliance on the physical scaling dictated by Moore’s Law, toward a new design philosophy centered on “Logical Folding.” This transition reflects not merely an engineering leap—but a dual breakthrough in theoretical originality and industrial leadership.

“Tao’s Law”: A Foundational Logical Revolution—Breaking Free from the EUV Narrative

Huawei first systematically articulated “Tao’s Law” in its White Paper on Ubiquitous Intelligent Computing, released late on May 24:
“The effective intelligent computing performance achievable per unit area of silicon is no longer determined by transistor physical dimensions, but rather by the topological reconstruction efficiency of logic units in three-dimensional space and the degree of entropy reduction along dataflow paths.”

In essence, Tao’s Law advocates Algorithm–Architecture–Circuit Co-Folding: compressing inference tasks that traditionally require tens of thousands of logic gates into hundreds of highly customized “logical folds” executed directly in hardware. Its core innovations are:

• At the architecture level: adoption of a Dynamically Reconfigurable Neuromorphic Array (DRNA), enabling runtime generation of task-specific data paths—effectively eliminating the von Neumann bottleneck;
• At the circuit level: integration of brain-inspired spiking encoding with in-memory computing units, achieving energy efficiency (TOPS/W) equivalent to advanced 3nm process nodes—even when fabricated on mature 7nm technology;
• At the software level: the companion Panshi Compiler automatically identifies redundant model logic and folds it into hardware-native primitives—demonstrating an 83% compression rate for Transformer-based models in real-world testing.

This approach completely bypasses the physical constraints imposed by ASML’s EUV lithography tools. While the global industry remains preoccupied with yield challenges at the 3nm node, Huawei has substituted “logical density” for “physical density,” transforming process-node dependency into architectural sovereignty. Industry experts observe: “Tao’s Law is not an extension of Moore’s Law—it is a dimensional downgrade attack. It declares obsolete the old formula ‘chip performance = transistor count × process precision,’ replacing it with a new one: ‘chip intelligence = logical folding depth × dataflow entropy reduction rate.’”

Kirin 2026 Nears Mass Production; Cambricon Validates Commercial Viability

Theoretical breakthroughs must be validated through industrial deployment. The Kirin 2026 chip—destined for Huawei’s upcoming Mate 70 series—is the first commercial embodiment of Tao’s Law. According to supply-chain sources, the chip is manufactured using SMIC’s N+3 process (equivalent to 5nm), yet achieves a staggering 28 TOPS of on-device large-model inference performance at just 4.2W power consumption—representing a 210% improvement over the prior-generation Kirin 9010. Crucially, its NPU instruction set is fully self-defined, freeing it entirely from ARM or Imagination IP licensing dependencies.

Cambricon’s soaring market capitalization is a direct reflection of this technology’s commercial traction. Its latest financial report reveals that orders for the MLU370 chip surged 340% quarter-on-quarter at AI computing centers, with customers spanning China’s three major telecom operators and leading internet firms. Meanwhile, samples of the MLU400—built upon the Tao’s Law architecture—have already entered customer validation; real-world tests show large-language model inference latency reduced to just 8.3ms (versus an industry average of 42ms). Behind its RMB 900-billion valuation lies market recognition of Cambricon’s strategic pivot—from an “IP licensor” to an “intelligent computing infrastructure service provider.” Technical barriers have now been converted into pricing power and customer stickiness.

STAR 50 Leads Gains: Domestic Substitution Enters a New Phase—Driven by Technical Validation

The wave of semiconductor stock limit-ups—and the STAR 50 Index’s robust 3.56% rise—reflects a fundamental shift in capital market logic. Over the past decade, domestic substitution was largely propelled by policy subsidies and import-substitution expectations, with valuations anchored to “potential gains in localization rates.” Today, the key drivers have shifted decisively to verifiable technical metrics, quantifiable commercial orders, and predictable mass-production timelines.

Data confirm this inflection point: SMIC’s Q1 2024 revenue from domestic clients reached 78.6%, up 12 percentage points year-on-year; Cambricon’s order backlog stands at RMB 13.7 billion—covering 18 months of production capacity; and R&D intensity among STAR Market semiconductor firms sits at a median of 22.4%, significantly exceeding peers listed on the Main Board. Where the question “Can we do it?” has now been answered definitively by Kirin 2026 and the MLU400, the new focal points are “How well do we do it?” and “How fast can we ship it?” This migration—from “policy narratives” to “technical narratives”—is reshaping the valuation framework for tech growth stocks: PE (price-to-earnings) multiples are losing weight, while quality indicators like PS (price-to-sales), R&D capitalization ratios, and customer concentration are gaining prominence.

Whole-Industry-Chain Revaluation: From Chip Design to Collaborative Breakthroughs in Equipment & Materials

The ripple effects of Tao’s Law extend far beyond chip design. To support the 3D stacking, heterogeneous integration, and novel interconnect technologies required by logical folding architectures, domestic equipment and materials companies are entering a strategic opportunity window. Northern Microelectronics’ wafer bonding equipment orders rose 260% year-on-year; Shanghai Silicon’s 12-inch SOI wafers have passed Kirin 2026 certification; and Anji Technology’s copper CMP slurry has captured over 35% market share in advanced packaging applications. This signals China’s semiconductor industry evolving from “isolated breakthroughs” to “systemic evolution”: design innovation is driving manufacturing upgrades, which in turn accelerate materials iteration—creating a virtuous flywheel.

Notably, this technological paradigm shift occurred concurrently with the U.S.–Iran Memorandum of Understanding on shipping through the Strait of Hormuz. Against growing geopolitical uncertainty, the strategic value of an autonomous technology pathway becomes ever more apparent: when external supply chains remain vulnerable to sudden disruption, only control over foundational logic definitions can truly erect an unassailable “moat” of industrial security.

This quiet revolution—sparked by Tao’s Law—is redrawing the global semiconductor industry’s power map. It sends a clear signal: China’s semiconductor self-reliance has moved beyond the anxieties of the “catch-up phase” and entered the confident era of the “defining phase.”